From 5494e9cd6f64bdefcb5d4127c14332ac71eaaa0d Mon Sep 17 00:00:00 2001
From: cottonvibes <cottonvibes@96395faa-99c1-11dd-bbfe-3dabce05a288>
Date: Wed, 2 Sep 2009 04:48:42 +0000
Subject: [PATCH] microVU/macroVU: When subtracting a reg by itself, its safer
 to just set the reg to 0, instead of actually doing the floating point
 subtraction. This fixes the problems in FFX2 introduced in r1710. Also thanks
 to rama who found out it was SUB that was breaking the game. (Saved me a lot
 of debugging to narrow down the problem ;p)

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1726 96395faa-99c1-11dd-bbfe-3dabce05a288
---
 pcsx2/x86/microVU_Upper.inl | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/pcsx2/x86/microVU_Upper.inl b/pcsx2/x86/microVU_Upper.inl
index 9ec2cd978f..9008ff0b29 100644
--- a/pcsx2/x86/microVU_Upper.inl
+++ b/pcsx2/x86/microVU_Upper.inl
@@ -117,6 +117,20 @@ void setupPass1(microVU* mVU, int opCase, bool isACC, bool noFlagUpdate) {
 	if (noFlagUpdate) { sFLAG.doFlag = 0; }
 }
 
+// Safer to force 0 as the result for X minus X than to do actual subtraction
+bool doSafeSub(microVU* mVU, int opCase, int opType, bool isACC) {
+	opCase1 {
+		if ((opType == 1) && (_Ft_ == _Fs_)) {
+			int Fs = mVU->regAlloc->allocReg(-1, isACC ? 32 : _Fd_, _X_Y_Z_W);
+			SSE2_PXOR_XMM_to_XMM(Fs, Fs); // Set to Positive 0
+			mVUupdateFlags(mVU, Fs, -1);
+			mVU->regAlloc->clearNeeded(Fs);
+			return 1;
+		}
+	}
+	return 0;
+}
+
 // Sets Up Ft Reg for Normal, BC, I, and Q Cases
 void setupFtReg(microVU* mVU, int& Ft, int& tempFt, int opCase) {
 	opCase1 {
@@ -141,6 +155,8 @@ void setupFtReg(microVU* mVU, int& Ft, int& tempFt, int opCase) {
 void mVU_FMACa(microVU* mVU, int recPass, int opCase, int opType, bool isACC, const char* opName) {
 	pass1 { setupPass1(mVU, opCase, isACC, ((opType == 3) || (opType == 4))); }
 	pass2 {
+		if (doSafeSub(mVU, opCase, opType, isACC)) return;
+		
 		int Fs, Ft, ACC, tempFt;
 		setupFtReg(mVU, Ft, tempFt, opCase);