diff --git a/pcsx2/x86/microVU_Analyze.inl b/pcsx2/x86/microVU_Analyze.inl
index a4b2a7ac5e..0301d2a476 100644
--- a/pcsx2/x86/microVU_Analyze.inl
+++ b/pcsx2/x86/microVU_Analyze.inl
@@ -122,6 +122,7 @@ microVUt(void) mVUanalyzeFMAC4(int Fs, int Ft) {
 
 #define analyzeVIreg1(reg)			{ if (reg) { mVUstall = aMax(mVUstall, mVUregs.VI[reg]); } }
 #define analyzeVIreg2(reg, aCycles)	{ if (reg) { mVUregsTemp.VIreg = reg; mVUregsTemp.VI = aCycles; mVUinfo |= _writesVI; mVU->VIbackup[0] = reg; } }
+#define analyzeVIreg3(reg, aCycles)	{ if (reg) { mVUregsTemp.VIreg = reg; mVUregsTemp.VI = aCycles; } }
 
 microVUt(void) mVUanalyzeIALU1(int Id, int Is, int It) {
 	microVU* mVU = mVUx;
@@ -296,6 +297,7 @@ microVUt(void) mVUanalyzeSflag(int It) {
 		// Do to stalls, it can only be set one instruction prior to the status flag read instruction
 		// if we were guaranteed no-stalls were to happen, it could be set 4 instruction prior.
 	}
+	analyzeVIreg3(It, 1);
 }
 
 microVUt(void) mVUanalyzeFSSET() {
@@ -326,16 +328,18 @@ microVUt(void) mVUanalyzeMflag(int Is, int It) {
 		iPC = curPC;
 	}
 	analyzeVIreg1(Is);
+	analyzeVIreg3(It, 1);
 }
 
 //------------------------------------------------------------------
 // Cflag - Clip Flag Opcodes
 //------------------------------------------------------------------
 
-microVUt(void) mVUanalyzeCflag() {
+microVUt(void) mVUanalyzeCflag(int It) {
 	microVU* mVU = mVUx;
 	mVUinfo |= _swapOps;
 	if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 0xf << (/*mVUcount +*/ 8); }
+	analyzeVIreg3(It, 1);
 }
 
 //------------------------------------------------------------------
diff --git a/pcsx2/x86/microVU_Flags.inl b/pcsx2/x86/microVU_Flags.inl
index 4dc2c8b226..aac54d574f 100644
--- a/pcsx2/x86/microVU_Flags.inl
+++ b/pcsx2/x86/microVU_Flags.inl
@@ -215,7 +215,7 @@ microVUt(void) mVUpass4(int startPC) {
 microVUt(void) mVUsetFlagInfo() {
 	microVU* mVU = mVUx;
 	branchType1 { incPC(-1); mVUpass4<vuIndex>(branchAddr); incPC(1); }
-	branchType2 { mVUflagInfo |= 0xffffffff; }
+	branchType2 { mVUflagInfo |= 0xfff; }
 	branchType3 {
 		incPC(-1); 
 		mVUpass4<vuIndex>(branchAddr);
diff --git a/pcsx2/x86/microVU_Lower.inl b/pcsx2/x86/microVU_Lower.inl
index d85db8f2ff..3880f57766 100644
--- a/pcsx2/x86/microVU_Lower.inl
+++ b/pcsx2/x86/microVU_Lower.inl
@@ -434,7 +434,7 @@ microVUf(void) mVU_ESUM() {
 
 microVUf(void) mVU_FCAND() {
 	microVU* mVU = mVUx;
-	pass1 { mVUanalyzeCflag<vuIndex>(); }
+	pass1 { mVUanalyzeCflag<vuIndex>(1); }
 	pass2 { 
 		mVUallocCFLAGa<vuIndex>(gprT1, fvcInstance);
 		AND32ItoR(gprT1, _Imm24_);
@@ -448,7 +448,7 @@ microVUf(void) mVU_FCAND() {
 
 microVUf(void) mVU_FCEQ() {
 	microVU* mVU = mVUx;
-	pass1 { mVUanalyzeCflag<vuIndex>(); }
+	pass1 { mVUanalyzeCflag<vuIndex>(1); }
 	pass2 { 
 		mVUallocCFLAGa<vuIndex>(gprT1, fvcInstance);
 		XOR32ItoR(gprT1, _Imm24_);
@@ -462,7 +462,7 @@ microVUf(void) mVU_FCEQ() {
 
 microVUf(void) mVU_FCGET() {
 	microVU* mVU = mVUx;
-	pass1 { mVUanalyzeCflag<vuIndex>(); }
+	pass1 { mVUanalyzeCflag<vuIndex>(_It_); }
 	pass2 { 
 		mVUallocCFLAGa<vuIndex>(gprT1, fvcInstance);
 		AND32ItoR(gprT1, 0xfff);
@@ -474,7 +474,7 @@ microVUf(void) mVU_FCGET() {
 
 microVUf(void) mVU_FCOR() {
 	microVU* mVU = mVUx;
-	pass1 { mVUanalyzeCflag<vuIndex>(); }
+	pass1 { mVUanalyzeCflag<vuIndex>(1); }
 	pass2 { 
 		mVUallocCFLAGa<vuIndex>(gprT1, fvcInstance);
 		OR32ItoR(gprT1, _Imm24_);
diff --git a/pcsx2/x86/microVU_Misc.h b/pcsx2/x86/microVU_Misc.h
index 66d996594a..f5a2e60174 100644
--- a/pcsx2/x86/microVU_Misc.h
+++ b/pcsx2/x86/microVU_Misc.h
@@ -207,7 +207,7 @@ declareAllVariables
 #define _backupVI	 (1<<22) // Backup VI reg to memory if modified before branch (branch uses old VI value unless opcode is ILW or ILWR)
 #define _memReadIs	 (1<<23) // Read Is (VI reg) from memory (used by branches)
 #define _memReadIt	 (1<<24) // Read If (VI reg) from memory (used by branches)
-#define _writesVI	 (1<<25) // Current Instruction writes to VI
+#define _writesVI	 (1<<25) // Current Instruction writes to VI (used by branches; note that flag-modifying opcodes shouldn't set this)
 #define _swapOps	 (1<<26) // Runs Lower Instruction Before Upper Instruction
 #define _isFSSET	 (1<<27) // Cur Instruction is FSSET
 #define _doDivFlag	 (1<<28) // Transfer Div flag to Status Flag