From 06db5bba385f18501bdf633b034f05eb4711268b Mon Sep 17 00:00:00 2001
From: gigaherz <gigaherz@96395faa-99c1-11dd-bbfe-3dabce05a288>
Date: Wed, 3 Feb 2010 03:59:21 +0000
Subject: [PATCH] Hackfix a problem with sio2 in the new dmac. It needs some
 changes to the dmac system (possibly a dmaStart function with more accurate
 information) to be implemented properly but for now, this will do. Also make
 the autodma messages work like before so they are configurable again.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2555 96395faa-99c1-11dd-bbfe-3dabce05a288
---
 pcsx2/IopDma.cpp           | 10 ++++++++--
 pcsx2/IopSio2.cpp          | 18 ++++++++++++++++--
 plugins/spu2-x/src/Dma.cpp |  3 ++-
 3 files changed, 26 insertions(+), 5 deletions(-)

diff --git a/pcsx2/IopDma.cpp b/pcsx2/IopDma.cpp
index 285ec70e8a..443f6fc0d1 100644
--- a/pcsx2/IopDma.cpp
+++ b/pcsx2/IopDma.cpp
@@ -375,7 +375,7 @@ const DmaHandlerInfo IopDmaHandlers[DMA_CHANNEL_MAX] =
 // runtime variables
 struct DmaChannelInfo
 {
-	u32 ByteCount;
+	s32 ByteCount;
 	s32 NextUpdate;
 } IopDmaChannels[DMA_CHANNEL_MAX] = {0};
 
@@ -426,6 +426,12 @@ void IopDmaStart(int channel)
 		}
 	}
 
+	// hack!
+	extern void sio2DmaSetBs(int bs);
+	if(channel==11 || channel==12)
+		sio2DmaSetBs(bcr_size);
+
+
 	//Console.WriteLn(Color_StrongOrange,"Starting NewDMA ch=%d, size=%d(0x%08x), dir=%d", channel, size, bcr, chcr&DMA_CTRL_DIRECTION);
 
 	IopDmaHandlers[channel].REG_CHCR() |= DMA_CTRL_ACTIVE;
@@ -477,7 +483,7 @@ static void __releaseinline IopDmaProcessChannel(int elapsed, int& MinDelay)
 				u32 ProcessedBytes = 0;
 				s32 RequestedDelay = (handler) ? handler(channel, (u32*)iopPhysMem(hh->REG_MADR()), ch->ByteCount, &ProcessedBytes) : 0;
 
-				if(ProcessedBytes>0)
+				if(ProcessedBytes>0 && (!(chcr & DMA_CTRL_DIRECTION)))
 				{
 					psxCpu->Clear(hh->REG_MADR(), ProcessedBytes/4);
 				}
diff --git a/pcsx2/IopSio2.cpp b/pcsx2/IopSio2.cpp
index bb627ee292..fe479fb59a 100644
--- a/pcsx2/IopSio2.cpp
+++ b/pcsx2/IopSio2.cpp
@@ -244,6 +244,12 @@ s32 sio2DmaRead(s32 channel, u32* tdata, u32 bytesLeft, u32* bytesProcessed)
 	return 0;
 }
 
+int sioBs = 0x24;
+void sio2DmaSetBs(int bs)
+{
+	sioBs = bs;
+}
+
 s32 sio2DmaWrite(s32 channel, u32* tdata, u32 bytesLeft, u32* bytesProcessed)
 {
 #ifdef ENABLE_NEW_IOPDMA_SIO
@@ -260,11 +266,19 @@ s32 sio2DmaWrite(s32 channel, u32* tdata, u32 bytesLeft, u32* bytesProcessed)
 	int written = 0;
 
 	// FIXME: temp code, might need to implement properly
-	int bs = 0x24;
+	int bs = sioBs;
 	int bc = bytesLeft / (bs*4);
 	int ts = bc * bs * 4;
 
-	assert(ts == bytesLeft);
+	// HACK!
+	if(ts != bytesLeft)
+	{
+		bs = bytesLeft;
+		bc = 1;
+
+	}
+
+	//assert(ts == bytesLeft);
 
 	for(int j=0;j<bc;j++)
 	{
diff --git a/plugins/spu2-x/src/Dma.cpp b/plugins/spu2-x/src/Dma.cpp
index 857c1fd714..aabbbfa8ce 100644
--- a/plugins/spu2-x/src/Dma.cpp
+++ b/plugins/spu2-x/src/Dma.cpp
@@ -535,7 +535,8 @@ s32 V_Core::NewDmaWrite(u32* data, u32 bytesLeft, u32* bytesProcessed)
 
 		if(DmaStarting)
 		{
-			ConLog(" * SPU2: AutoDMA transfer starting on core %d: %d bytes\n", Index, bytesLeft);
+			if(MsgAutoDMA()) ConLog(" * SPU2: DMA%c AutoDMA Transfer of %d bytes to %x (%02x %x %04x).\n",
+				GetDmaIndexChar(), bytesLeft<<1, TSA, DMABits, AutoDMACtrl, (~Regs.ATTR)&0x7fff);
 		}
 
 		u32 processed = 0;