9431deb271
Bus: Support 16MB expanded memory
2026-03-01 17:26:30 +10:00
56d79c76a7
GPU: Extract heavier helper functions to own header
2025-12-23 20:00:58 +10:00
654587ea38
System: Add 'Low VRAM' rewind mode
...
i.e. use the software renderer for rewinding instead.
Works fairly well, and takes away the VRAM hit when upscaling.
2025-11-21 01:59:03 +10:00
8bce5b0a55
CPU/PGXP: Make register writes more readable
2025-10-09 23:06:12 +10:00
05a58285aa
CPU/PGXP: Handle SXYP mirror reads
...
Fixes PGXP on some parts of geometry in Legend of Legaia.
Also fixes broken PGXP in Boxing and Touge Max G.
2025-10-09 23:06:12 +10:00
3966a9eea7
System: Serialize PGXP state for runahead
2025-10-04 17:51:25 +10:00
790ac23515
GPU: Get present parameters before allocating command
...
Fixes corruption/crash when video frame rate changes with capture
active.
2025-09-22 17:12:16 +10:00
ba0390f6e0
System: Fix patch settings not clearing on game change
...
Also the redundant memory card notification when loading state.
2025-09-22 15:32:03 +10:00
b106392da0
CPU/PGXP: Implement lwl/lwr/swl/swr
...
Fixes gaps in sky geometry in Kingsley's Adventure.
2025-09-21 19:00:03 +10:00
0479500357
CPU: Correctly mask upper 1.5GB of KUSEG
...
Stops fastmem going into a loop when trying to backpatch accesses
above 512MB.
2025-04-08 21:39:29 +10:00
b230c9c639
CPU/PGXP: Use GTE MAX_Z for Z normalization
...
Fixes clipping with depth buffer in some games, e.g. Final Fantasy VII battles.
2025-03-06 22:41:10 +10:00
25b0bb752a
GPU/HW: Try truncating culled vertices
...
What is this monstrosity? Final Fantasy VIII relies on X coordinates
being truncated during scanline drawing, with negative coordinates
becoming positive and vice versa. Fortunately the bits that we need
are consistent across the entire polygon, so we can get away with
truncating the vertices. However, we can't do this to all vertices,
because other game's vertices break in various ways. For example,
+1024 becomes -1024, which is a valid vertex position as the ending
coordinate is exclusive. Therefore, 1024 is never truncated, only
1023. Luckily, FF8's vertices get culled as they do not intersect
with the clip rectangle, so we can do this fixup only when culled,
and everything seems happy.
2024-12-28 20:24:21 +10:00
6551358212
Log: Replace channel string search with bitset
...
Knocks off around ~20KB of code.
2024-10-31 14:41:33 +10:00
3dca598063
Log: Switch to enum class
...
Need to change the channel to a bitset too.. the string lookups are
horribly slow, and conflict when one is a prefix of another.
2024-09-21 22:26:06 +10:00
7f4e5d55db
Misc: Update copyright headers
2024-09-01 22:08:31 +10:00
2971b2f34c
CPU/PGXP: Inline valid flag updates
2024-08-20 21:18:07 +10:00
d4d813f043
CPU/PGXP: Identifier name consistency
2024-08-20 20:43:21 +10:00
dadf388657
CPU/PGXP: Make validate a member function
2024-08-20 21:09:12 +10:00
491179a447
CPU/PGXP: Remove remaining C-isms
2024-08-20 19:12:51 +10:00
a764954977
CPU/PGXP: Eliminate extra copy in SLT/SLTU
2024-08-20 18:35:49 +10:00
8629efc39c
CPU/PGXP: Purge macros
2024-08-20 18:33:18 +10:00
514116e6c3
CPU/PGXP: Rewrite SLL handler
...
Shift flags as well as the values.
2024-08-20 17:24:04 +10:00
bcd2424db3
CPU/PGXP: Combine logical/arithmetic shift functions
2024-08-20 17:23:36 +10:00
3548bbcf90
CPU/PGXP: Combine static/variable shift instructions
2024-08-20 17:18:33 +10:00
2662694c04
CPU/PGXP: Purge psx_value completely
2024-08-20 16:55:24 +10:00
fc375d76b5
CPU/PGXP: Purge psx_value from shifts
2024-08-20 16:42:51 +10:00
302652df22
CPU/PGXP: Purge psx_value from first half of instructions
2024-08-20 16:27:39 +10:00
9a6de196a3
CPU/PGXP: Use Instruction type
2024-08-19 22:22:18 +10:00
7dc78dbcd5
CPU/PGXP: Make MTC2/LWC2 behave the same
2024-08-20 20:06:04 +10:00
64a28aac53
CPU/PGXP: Fix typo in SLTU()
2024-08-20 19:27:26 +10:00
11f7bfc461
CPU/PGXP: Refactor add/sub for small speedup
2024-07-10 20:56:42 +10:00
e5c62b8baf
CPU/PGXP: Fix incorrect Y on invalid add/sub
2024-07-10 20:56:21 +10:00
5881133cf5
CPU/PGXP: Set valid on bitwise ops from lowprec
2024-07-10 19:10:56 +10:00
f0e2d1a9fa
CPU/PGXP: Rewrite SLTI/SLTIU handlers
...
Don't read uninitialized memory...
2024-07-09 20:14:08 +10:00
d922a43127
CPU/PGXP: Don't force valid input on slt/sltu
2024-07-09 19:45:44 +10:00
3b7844be5a
CPU/PGXP: Don't force valid inputs on mult/div
2024-07-09 19:21:47 +10:00
d831cb69a9
CPU/PGXP: Normalize variable names
2024-07-09 19:16:16 +10:00
5410a42fd7
CPU/PGXP: Explicitly handle addi rt, zero, nnnn
2024-07-09 19:07:17 +10:00
b6f7420018
CPU/PGXP: Don't force inputs to valid on add/sub
2024-07-08 17:18:27 +10:00
22c76d43c3
CPU/PGXP: Reduce vertex cache memory
2024-05-25 02:06:40 +10:00
4e922a34a7
Log: Simplify macros
2024-05-24 02:08:14 +10:00
7476baced6
CPU/PGXP: Track valid Z for lower/upper halves of 32-bit values
...
Dragon Valor writes both lower and upper halfwords separately from
non-valid-Z values. The Z needs to be cleared out.
2024-05-18 00:33:22 +10:00
ea4efb4e52
CPU/PGXP: Prefer fresh over tainted Z values
...
Fixes terrain polygon's Z in Wild Arms 2 after battles.
2024-05-18 00:33:22 +10:00
5672b0da95
CPU/PGXP: sub rd, rs, 0 => move rd, rs
2024-05-18 00:33:22 +10:00
bbac7a60a0
CPU/PGXP: Don't set high bits of flags
2024-05-18 00:33:22 +10:00
37b1aa45dd
CPU/PGXP: Minor optimization to shift instructions
2024-05-18 00:33:22 +10:00
3fd86a69a4
CPU/PGXP: Use component enum
2024-05-18 00:33:22 +10:00
e4bedbbbfa
CPU/PGXP: Readability improvements
2024-05-17 23:46:18 +10:00
29d4e04e3b
CPU/PGXP: Use bit math for flags instead of union
2024-05-17 23:46:18 +10:00
82f3e17b78
CPU: Value logging/tracing for PGXP
2024-05-17 23:46:18 +10:00
Stenzek