diff --git a/tools/usse-decoder-gen/grammar.yaml b/tools/usse-decoder-gen/grammar.yaml
index 1cfc46afd..3f7070ac2 100644
--- a/tools/usse-decoder-gen/grammar.yaml
+++ b/tools/usse-decoder-gen/grammar.yaml
@@ -788,8 +788,61 @@ I32MAD:
     description: 32-bit Integer multiply-add
     members:
         - opcode1: '10101'
+        - pred:
+            size: 2
+            type: ShortPredicate
+        - src0_high:
+            size: 1
         - DONTCARE:
-            size: 59
+            size: 1
+        - nosched:
+            size: 1
+        - src1_high:
+            size: 1
+        - src2_high:
+            size: 1
+        - dest_bank_ext:
+            size: 1
+            type: bool
+        - end:
+            size: 1
+        - src1_bank_ext:
+            size: 1
+            type: bool
+        - src2_bank_ext:
+            size: 1
+            type: bool
+        - unk0: '0'
+        - repeat_count:
+            size: 3
+            type: RepeatCount
+        - is_signed:
+            size: 1
+            type: bool
+        - is_sat:
+            size: 1
+            type: bool
+        - unk1: '00'
+        - src2_type:
+            size: 2
+        - unk2: '000'
+        - src0_bank:
+            size: 1
+        - dest_bank:
+            size: 2
+        - src1_bank:
+            size: 2
+        - src2_bank:
+            size: 2
+        - dest_n:
+            size: 7
+        - src0_n:
+            size: 7
+        - src1_n:
+            size: 7
+        - src2_n:
+            size: 7
+
 ILLEGAL22:
     description: Illegal instruction
     members:
diff --git a/vita3k/shader/include/shader/usse_translator.h b/vita3k/shader/include/shader/usse_translator.h
index a63fe3eb0..54a2c6361 100644
--- a/vita3k/shader/include/shader/usse_translator.h
+++ b/vita3k/shader/include/shader/usse_translator.h
@@ -512,7 +512,27 @@ public:
 
     bool i16mad();
 
-    bool i32mad();
+    bool i32mad(ShortPredicate pred,
+        Imm1 src0_high,
+        Imm1 nosched,
+        Imm1 src1_high,
+        Imm1 src2_high,
+        bool dest_bank_ext,
+        Imm1 end,
+        bool src1_bank_ext,
+        bool src2_bank_ext,
+        RepeatCount repeat_count,
+        bool is_signed,
+        bool is_sat,
+        Imm2 src2_type,
+        Imm1 src0_bank,
+        Imm2 dest_bank,
+        Imm2 src1_bank,
+        Imm2 src2_bank,
+        Imm7 dest_n,
+        Imm7 src0_n,
+        Imm7 src1_n,
+        Imm7 src2_n);
 
     bool illegal22();
 
diff --git a/vita3k/shader/src/translator/ialu.cpp b/vita3k/shader/src/translator/ialu.cpp
index 6a5402bf9..40bef2206 100644
--- a/vita3k/shader/src/translator/ialu.cpp
+++ b/vita3k/shader/src/translator/ialu.cpp
@@ -151,7 +151,28 @@ bool USSETranslatorVisitor::i16mad() {
     return true;
 }
 
-bool USSETranslatorVisitor::i32mad() {
+bool USSETranslatorVisitor::i32mad(
+    ShortPredicate pred,
+    Imm1 src0_high,
+    Imm1 nosched,
+    Imm1 src1_high,
+    Imm1 src2_high,
+    bool dest_bank_ext,
+    Imm1 end,
+    bool src1_bank_ext,
+    bool src2_bank_ext,
+    RepeatCount repeat_count,
+    bool is_signed,
+    bool is_sat,
+    Imm2 src2_type,
+    Imm1 src0_bank,
+    Imm2 dest_bank,
+    Imm2 src1_bank,
+    Imm2 src2_bank,
+    Imm7 dest_n,
+    Imm7 src0_n,
+    Imm7 src1_n,
+    Imm7 src2_n) {
     LOG_DISASM("Unimplmenet Opcode: i32mad");
     return true;
 }
diff --git a/vita3k/shader/src/usse_translator_entry.cpp b/vita3k/shader/src/usse_translator_entry.cpp
index 50c6a4d5c..49a324ce0 100644
--- a/vita3k/shader/src/usse_translator_entry.cpp
+++ b/vita3k/shader/src/usse_translator_entry.cpp
@@ -458,9 +458,33 @@ boost::optional<const USSEMatcher<V> &> DecodeUSSE(uint64_t instruction) {
         // 32-bit Integer multiply-add
         /*
                                        10101 = opcode1
-                                            ----------------------------------------------------------- = don't care
+                                            pp = pred (2 bits, ShortPredicate)
+                                              s = src0_high (1 bit)
+                                               - = don't care
+                                                n = nosched (1 bit)
+                                                 r = src1_high (1 bit)
+                                                  c = src2_high (1 bit)
+                                                   d = dest_bank_ext (1 bit, bool)
+                                                    e = end (1 bit)
+                                                     b = src1_bank_ext (1 bit, bool)
+                                                      a = src2_bank_ext (1 bit, bool)
+                                                       0 = unk0
+                                                        ttt = repeat_count (3 bits, RepeatCount)
+                                                           i = is_signed (1 bit, bool)
+                                                            f = is_sat (1 bit, bool)
+                                                             00 = unk1
+                                                               yy = src2_type (2 bits)
+                                                                 000 = unk2
+                                                                    k = src0_bank (1 bit)
+                                                                     gg = dest_bank (2 bits)
+                                                                       hh = src1_bank (2 bits)
+                                                                         jj = src2_bank (2 bits)
+                                                                           lllllll = dest_n (7 bits)
+                                                                                  mmmmmmm = src0_n (7 bits)
+                                                                                         ooooooo = src1_n (7 bits)
+                                                                                                qqqqqqq = src2_n (7 bits)
         */
-        INST(&V::i32mad, "I32MAD ()", "10101-----------------------------------------------------------"),
+        INST(&V::i32mad, "I32MAD ()", "10101pps-nrcdeba0tttif00yy000kgghhjjlllllllmmmmmmmoooooooqqqqqqq"),
         // Illegal instruction
         /*
                                              10110 = opcode1